1. Field of the Invention
This invention relates to an etching solution for porous silicon, an etching method using the etching solution and a method of producing a semiconductor member using the etching solution. Particularly, this invention relates to a method of producing a semiconductor member which is suitable for separation of dielectric materials or electronic devices, integrated circuits prepared on a monocrystalline semiconductor layer on an insulating material.
2. Related Background Art
Formation of a monocrystalline Si semiconductor layer on an insulating material has been widely known as the silicon on insulator (SOI) technology, and since a large number of advantages which cannot be reached by bulk Si substrates for preparation of conventional Si integrated circuits are possessed by the device utilizing the SOI structure, so many researches have been done. More specifically, by utilizing the SOI structure, the following advantages can be obtained:
1. Dielectric isolation can be easily done to enable high degree of integration; PA1 2. Radiation hardness is excellent; PA1 3. Stray capacity is reduced to attain high speed; PA1 4. Well formation step can be omitted; PA1 5. Latch-up can be prevented; PA1 6. Fully depleted field effect transistor can be made by thin film formation. PA1 m2: total weight after anodization PA1 m3: total weight after removal of porous Si PA1 .rho.: density of monocrystalline Si PA1 A: area of porous region PA1 t: thickness of porous Si
In order to realize the many advantages in device characteristics as mentioned above, studies have been made about the method for forming the SOI structure for these some 10 years. The contents are summarized in, for example, the literature as mentioned below:
Special Issue: "Single-crystal silicon on non-single-crystal insulators"; edited by G. W. Cullen, Journal of Crystal Growth, Volume 63, No. 3, pp. 429-590 (1983).
Also, it has been known for a long time to form the SOS (silicon on sapphire) structure by heteroepitaxy of Si on a monocrystalline sapphire substrate by CVD (chemical vapor deposition) method. This was successful to some extent as the most mature SOI technique, but for such reasons as a large amount of crystal defects because of lattice mismatching at the interface between the Si layer and the sapphire substrate, introduction of aluminum from the sapphire substrate into the Si layer, and above all the high cost of the substrate and delay in enlargement of the substrate wafer size, it is obstructed from being widely applied. In recent years, attempts to realize the SOI structure without use of a sapphire substrate have been done. Such attempts may be broadly classified into the two shown below:
(1) After surface oxidation of an Si monocrystalline substrate, a window is formed to have the Si substrate partially exposed, and epitaxial growth is proceeded in the lateral direction with that exposed portion as the seed to form an Si monocrystalline layer on SiO.sub.2. (In this case, deposition of Si layer on SiO.sub.2 is accompanied).
(2) By use of an Si monocrystalline substrate itself as an active layer, SiO.sub.2 is formed therebeneath. (This method is accompanied with no deposition of Si layer).
As the means for realizing the above (1), there have been known the method in which a monocrystalline Si layer is formed directly to lateral epitaxial growth by CVD, the method in which amorphous Si is deposited and subjected to solid phase lateral epitaxial growth by heat treatment, the method in which an amorphous or polycrystalline Si layer is irradiated convergently with an energy beam such as electron beam, laser beam, etc. and a monocrystalline layer is grown on SiO.sub.2 by melting and recrystallization, and the method in which a melting region is scanned in a zone fashion by a rod-shaped heater (Zone melting recrystallization). These methods have both advantages and disadvantages, they still have many problems with respect to controllability, productivity, uniformity and quality, and none of them have been industrially applied to date. For example, the CVD method requires sacrifice-oxidation in flat thin film formation, while the crystallinity is poor in the solid phase growth method. On the other hand, in the beam annealing method, problems are involved in controllability such as treatment time by converged beam scanning, the manner of overlapping of beams, focus adjustment, etc. Among these, the Zone Melting Recrystallization method is the most mature, and a relatively larger scale integrated circuit has been trially made, but still a large number of crystal defects such as point defects, line defects, plane defects (sub-boundary), etc. remain, and no device driven by minority carriers has been prepared.
Concerning the method using no Si substrate as the seed for epitaxial growth which is the above method (2), for example, the following methods may be included.
1. An oxide film is formed on an Si monocrystalline substrate with V-grooves as anisotropically etched on the surface, a polycrystalline Si layer is deposited on the oxide film thick to the extent as the Si substrate, and thereafter by polishing from the back surface of the Si substrate, Si monocrystalline regions dielectrically separated by surrounding with the V-grooves on the thick polycrystalline Si layer are formed. In this method, although crystallinity is good, there are problems with respect to controllability and productivity in the step of depositing the polycrystalline Si thick as some hundred microns and the step in which the monocrystalline Si substrate is polished from the back surface to leave only the Si active layer as separated.
2. This is the method called SIMOX (Separation by ion-implanted oxygen) in which an SiO.sub.2 layer is formed by ion implantation of oxygen into an Si monocrystalline substrate, which is one of the most mature methods because of good matching with the Si-IC (Integrated Circuit) process. However, for formation of the SiO.sub.2 layer, 10.sup.18 ions/cm.sup.2 or more of oxygen ions are required to be implanted, and the implantation time is very long to be not high in productivity, and also the wafer cost is high. Further, many crystal defects remain, and from an industrial point of view, no sufficient level of quality capable of preparing a device driven by minority carriers have been attained.
3. This is the method to form an SOI structure by dielectric isolation according to oxidation of porous Si. This is a method in which an N-type Si layer is formed on the surface of a P-type Si monocrystalline substrate in shape of islands by way of proton ion implantation (Imai et al., J. Crystal Growth, Vol. 63, 547 (1983)), or by epitaxial growth and patterning; only the P-type Si substrate is made porous by anodization in HF solution so as to surround the Si islands from the surface; and then the N-type Si islands are dielectrically isolated by accelerated oxidation. In this method, the separated Si region is determined before the device steps, whereby there is the problem that the degree of freedom in drive and circuit design may be limited in some cases.
A light-transmissive substrate is important for forming a contact sensor serving as a light-receiving device and a projection-type liquid crystal image display. A high-quality driving device is required for further increasing the density, resolution and definition of the pixels (picture element) of such a sensor or display. It is consequently necessary to produce a device to be provided on a light-transmissive substrate by using a monocrystalline layer having excellent crystallinity.
However, if an Si layer is deposited on a light-transmissive substrate such as glass substrate, etc., the Si layer is generally an amorphous layer or, at best, a polycrystalline layer because the Si layer reflects the disorder of the crystal structure of the substrate, and no high-quality device can thus be formed by using the Si layer. This is because the substrate has an amorphous crystal structure, and thus a monocrystalline layer of high quality cannot be easily obtained by simply depositing the Si layer. It is therefore difficult to produce a driving device having properties sufficient for the present demands or future demands because the crystal structure of an amorphous Si or polycrystalline Si has many defects.
Further, any one of the methods using an Si monocrystalline substrate is unsuitable for obtaining a good monocrystalline film on a light-transmissive substrate.
Takao Yonehara, one of the inventors, previously proposed a method of forming a semiconductor substrate which is capable of solving the above problems in Japanese Patent Application No. 2-206548.
The method of forming a semiconductor substrate disclosed in Patent Application No. 2-206548 comprises forming a substrate having a non-porous semiconductor monocrystalline layer and a porous semiconductor layer, bonding another substrate having an insulating material surface to the surface of the monocrystalline layer, and removing the porous semiconductor layer by etching.
This invention has been achieved for improving the invention disclosed in Patent Application No. 2-206548 previously proposed.
The method of forming a semiconductor substrate disclosed in Patent Application No. 2-206548 comprises the step of removing porous Si by selective etching.
Porous Si is described below.
Porous Si was discovered in the course of research on electrolytic polishing of a semiconductor which was conducted by Uhlir et al, in 1956 (A. Uhlir, Bell Syst. Tech. J., Vol. 35, pp 333 (1956)).
Unagami et al. investigated dissolving reaction of Si during anodization and reported that the anodic reaction of Si in a HF solution requires positive holes, and that the reaction is expressed as follows (T. Unagami, J. Electrochem. Soc., Vol. 127, pp 476 (1980)):
Si+2HF+(2-n)e.sup.+.fwdarw.SiF.sub.2 +2H.sup.+ +ne.sup.- (1) EQU SiF.sub.2 +2HF.fwdarw.SiF.sub.4 +H.sub.2 (2) EQU SiF.sub.4 +2HF.fwdarw.H.sub.2 SiF.sub.6 (3)
or EQU Si+4HF+(4-.lambda.)e.sup.+.fwdarw.SiF.sub.4 +4H.sup.+ +.lambda.e.sup.- (4) EQU SiF.sub.4 +2HF.fwdarw.H.sub.2 SiF.sub.6 (5)
wherein e.sup.+ and e.sup.- respectively denote a positive hole and an electron, and n and .lambda. each denotes the number of positive holes required for dissolving one silicon atom. Porous Si can be formed when the condition, n&gt;2 or .lambda.&gt;4, is satisfied.
It is therefore found that positive holes are required for forming porous Si, and that P-type Si can be more easily made porous than N-type Si. However, it is also known that N-type Si can be made porous if holes are implanted thereto (R. P. Holmstrom and J. Y. Chi, Appl. Phys. Lett., Vol. 42, 386 (1983)).
The density of the porous Si layer can be changed to the range of 1.1 to 0.6 g/cm.sup.3 by changing the concentration of the HF solution from 50 to 20%, as compared with the density of 2.33 g/cm.sup.3 of monocrystalline Si. The porous Si layer has pores having an average size of about 600 .ANG. which was measured by observation by a transmission electron microscope. Although the porous Si layer has a density which is half or less than that of monocrystalline Si, monocrystallinity is maintained, and a monocrystalline Si layer can be formed on the porous layer by epitaxial growth.
Although the volume of an Si monocrystal is generally increased by 2.2 times by oxidation, the increase in volume can be suppressed by controlling the density of the porous Si so that the occurrence of curvature of a substrate or the occurrence of a crack in a monocrystalline layer remained on the surface can be avoided during the oxidation process. The volume ratio R of monocrystalline Si to porous Si after oxidation can be expressed as follows: EQU R=2.2.times.(A/2.33) (6)
wherein A denotes the density of porous Si. If R=1, i.e., there is no increase in volume after oxidation, A=1.06 (g/cm.sup.3). Namely, if the density of the porous Si layer is 1.06, an increase in volume, which is caused by oxidation, can be suppressed.
It can be said that at present, porous Si is subjected as such directly to subsequent steps (epitaxial growth and oxidation) after producting it, and the porous Si itself is not processed. This is because the porous Si cannot be easily processed or removed with good controllability. Namely, it has been not reported yet that porous Si is etched with good controllability.
In addition, P generally shown by the following equation is referred as porosity: EQU P=(2.33-A)/2.33 (7)
When the value of porosity is adjusted to 30 to 55% during anodization, the properties of oxidized porous Si can be equalized to those of a monocrystalline Si oxide film. The porosity is expressed as follows: EQU P=(m1-m2)/(m1-m3) (8)
or EQU P=(m1-m2)/.rho.At (9)
wherein m1: total weight before anodization
However, the area of the porous region cannot be accurately calculated in many cases. In this case, although the equation (8) is effective, the porous Si must be etched for measuring the value of m3.
In addition, during epitaxial growth on the porous Si, the porous Si is capable of relieving distortion produced during heteroepitaxial growth and suppressing the occurrence of defects. However, in this case, since it is clear that the porosity is a very important parameter, measurement of the porosity is necessary and indispensable.
Known methods of etching porous Si are the following methods (1) and (2):
(1) The method of etching porous Si with an aqueous NaOH solution (G. Bonchil, R. Herino, K. Barla, and J. C. Pfister, J. Electrochem. Soc., Vol. 130, No. 7, 1611 (1983)).
(2) The method of etching porous Si with an etching solution which is capable of etching non-porous Si.
In the above method (2), a fluoronitric acid-type etching solution is generally used, and etching of Si proceeds as follows: EQU Si+2O.fwdarw.SiO.sub.2 (10) EQU SiO.sub.2 +4HF.fwdarw.SiF.sub.4 +H.sub.2 O (11)
As shown by the above reaction formulas, Si is oxidized to SiO.sub.2, and the SiO.sub.2 produced is etched with hydrofluoric acid.
Examples of etching solutions for non-porous Si include the above fluoronitric acid-type etching solution as well as ethylenediamine-type, KOH-type and hydrazine-type etching solutions and the like.
In this invention, it is necessary in selective etching of porous Si to select an etching solution which is capable of etching porous Si, other than the above etching solutions for non-porous Si. The porous Si is generally selectively etched by the above method (1) which uses an aqueous NaOH solution as an etching solution.
As described above, both porous and non-porous Si are etched with the fluoronitric acid-type etching solution.
On the other hand, in the conventional method of selectively etching porous Si with an aqueous NaOH solution, Na ions are inevitably adsorbed on the etched surface. Since the Na ions cause impurity contamination, are movable and have adverse effects such as the formation of a interfacial states, the ions must not be introduced into the semiconductor process.